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SN74HCS596 数据表(PDF) 3 Page - Texas Instruments |
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SN74HCS596 数据表(HTML) 3 Page - Texas Instruments |
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3 / 28 page ![]() 1 2 3 7 4 5 6 14 13 12 8 11 10 9 GND SER RCLK SRCLK V CC 15 16 Q B Q C Q D Q E Q F Q G Q H Q A OE SRCLR Q H¶ 3 SN74HCS596-Q1 www.ti.com SCLS805 – JUNE 2020 Product Folder Links: SN74HCS596-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 5 Pin Configuration and Functions D and PW 16-Pin SOIC and TSSOP Top View Pin Functions PIN TYPE DESCRIPTION NAME NO. QB 1 Output QB output (open-drain) QC 2 Output QC output (open-drain) QD 3 Output QD output (open-drain) QE 4 Output QE output (open-drain) QF 5 Output QF output (open-drain) QG 6 Output QG output (open-drain) QH 7 Output QH output (open-drain) GND 8 — Ground QH' 9 Output Serial output, can be used for cascading (push-pull) SRCLR 10 Input Shift register clear, active low SRCLK 11 Input Shift register clock, rising edge triggered RCLK 12 Input Output register clock, rising edge triggered OE 13 Input Output Enable, active low SER 14 Input Serial input QA 15 Output QA output (open-drain) VCC 16 — Positive supply |
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