SCD55100A, SCD55101A, SCD55102A, SCD55103A, SCD55104A

2006-02-20

5

Input/Output Circuits

Figures „Inputs“ and „Clock I/O“ show the input and output resis-

tor/diode networks used for ESD protection and to eliminate sub-

strate latch-up caused by input voltage over/under shoot.

Inputs

Top View

Clock I/O

Electrical Characteristics (over operating temperature)

Parameter

Min.

Typ.

Max.

Units

Conditions

V

CC

4.5

5.0

5.5

V

—

(4)

—

50

—

µA

V

—

250

365

mA

V

at 100% brightness at 25

°C

—

—

–10

µA

V

—

—

10

µA

V

3.5

—

—

V

V

—

—

1.5

V

V

—

–8.9

—

mA

V

—

1.6

—

mA

V

θ

JA

—

—

31

°C/W

—

F

120

—

347

kHz

V

F

120

—

347

kHz

V

Clock I/O Bus Loading

—

—

240

pF

—

Clock Out Rise Time

—

—

500

ns

V

Clock Out Fall Time

—

—

500

ns

V

FM, Digit

375

768

1086

Hz

—

Notes:

1)

Peak current

CC.

2)

Unused inputs must be tied high.

3)

Contact Infineon for 3.3 V operation.

4)

External oscillator must be stopped if being used to maintain an I

IDCD5021

GND

1 k

Ω

Input

CC

V

114

28

15

IDPA5117

IDCD5026

GND

1 k

Ω

Input/Output

CC

V