SCE5780

2006-01-23

8

column data bits. The three most significant bits, D7–D5 represent

the opcode for the row data and the least significant five bits, D4–

D0 represent the column data. See Table „Load Column Data“

all seven rows are written, the next column data will be loaded into

Row 0 of the new address. The remaining rows of the old address

are not changed.

Table Charcater „D“

(page 8) shows the Row Address for the

example character, “D.” Column data is written and read asynchro-

nously from the 280 bit RAM. Once loaded, the internal oscillator

and character multiplexer reads the data from the RAM. These

characters are row strobed with column data as shown in Figures

„Row and Column Locations for a Character ’D’“

(page 9) and

„Row Strobing“

(page 10). The character strobe rate is determined

by the internal or user supplied external MUX Clock and the

ICs÷ 320 counter.

Loading Serial Character Data

Character „D“

Row

Op code

D7

D6

D5

Column Data

D4

D3

D2

D1

D0

C0

C1

C2

C3

C4

Hex

0

00

0

11

1

1

0

1E

1

00

0

10

0

0

1

11

2

00

0

10

0

0

1

11

3

00

0

10

0

0

1

11

4

00

0

10

0

0

1

11

5

00

0

10

0

0

1

11

6

00

0

11

1

1

0

1E

Character 0

Character 1

Character 2

Character 3

Character 4

Character 5

Character 6

Character 7

Example: Serial Clock=5.0 MHz, Clock Period=200 ns

Time between LOADS

LOAD

Serial

Clock

DATA

Clock

Period

D0

D1

D2

D3

D4

D5

D6

D7

11 Clock Cycles, 2.2

µs

Time

Between

Loads

600 ns(min)

Character Address

OPCODE

OPCODE

Column Data

D0

D

D1

D

D2

D

D3

D

D4

D

11 Clock Cycles, 2.2

µs

Character 0

Address

Row 0 Column

Data

88 Clock Cycles, 17.6

µs

704 Clock Cycles, 140.8

µs

Row 1 Column

Data

Row 2 Column

Data

Row 3 Column

Data

Row 4 Column

Data

D0

0

D1

0

D2

0

D3

0

D4

0

D5

1

D6

0

D7

1

a.

b.

c.

d.

Row 5 Column

Data

Row 6 Column

Data

D5

0

D6

0

D7

0

Time

Between

Loads

600 ns(min)

OPCODE