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SCE5740 数据表(PDF) 5 Page - OSRAM GmbH |
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SCE5740 数据表(HTML) 5 Page - OSRAM GmbH |
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5 / 16 page  SCE5740, SCE5741, SCE5742, SCE5743, SCE5744, SCE5745 2006-03-30 5 Timing Diagram—Data Write Cycle Timing Diagram—Instruction Cycle Switching Specifications (over operating temperature range and V CC=4.5 V to 5.5 V) Symbol Description Min. Units Symbol Description Min. Units TRC Reset Active Time 600 ns TSDCW Clock Width 70 ns TLDS Load Setup Time 50 ns TLDH Load Hold Time 0 ns TDS Data Setup Time 50 ns TDH Data Hold Time 25 ns TSDCLK Clock Period 200 ns TWR Total Write Time 2.2 µs TBL Time Between Loads 600 ns Note: TSDCW is the minimum time the SDCLK may be low or high. The SDCLK period must be a minimum of 200 ns. SDCLK SDCLK T SDCW T DATA LOAD D0 DS T LDS T TDH D7 LDH T LOAD LOAD DATA DATA SDCLK SDCLK D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 D0 D0 BL T WR T OR |
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