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STM32F427NET6XXX 数据表(PDF) 163 Page - STMicroelectronics |
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STM32F427NET6XXX 数据表(HTML) 163 Page - STMicroelectronics |
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163 / 231 page ![]() DocID024030 Rev 6 163/231 STM32F427xx STM32F429xx Electrical characteristics 192 6.3.26 FMC characteristics Unless otherwise specified, the parameters given in Table 86 to Table 101 for the FMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 17, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 except at VDD range 1.7 to 2.1V where OSPEEDRy[1:0] = 11 • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 6.3.17: I/O port characteristics for more details on the input/output characteristics. Asynchronous waveforms and timings Figure 55 through Figure 58 represent asynchronous waveforms and Table 86 through Table 93 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 • For SDRAM memories, VDD ranges from 2.7 to 3.6 V and maximum frequency FMC_SDCLK = 90 MHz • For Mobile LPSDR SDRAM memories, VDD ranges from 1.7 to 1.95 V and maximum frequency FMC_SDCLK = 84 MHz |
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