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STM32F427NET7 数据表(PDF) 105 Page - STMicroelectronics |
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STM32F427NET7 数据表(HTML) 105 Page - STMicroelectronics |
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105 / 231 page  DocID024030 Rev 6 105/231 STM32F427xx STM32F429xx Electrical characteristics 192 Figure 26. Typical VBAT current consumption (LSE and RTC ON/backup RAM ON) Additional current consumption The MCU is placed under the following conditions: • All I/O pins are configured in analog mode. • The Flash memory access time is adjusted to fHCLK frequency. • The voltage scaling is adjusted to fHCLK frequency as follows: – Scale 3 for fHCLK ≤ 120 MHz, – Scale 2 for 120 MHz < fHCLK ≤ 144 MHz – Scale 1 for 144 MHz < fHCLK ≤ 180 MHz. The over-drive is only ON at 180 MHz. • The system clock is HCLK, fPCLK1 = fHCLK/4, and fPCLK2 = fHCLK/2. • HSE crystal clock frequency is 25 MHz. • When the regulator is OFF, V12 is provided externally as described in Table 17: General operating conditions • TA= 25 °C . |
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