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PIC12LF1501 数据表(PDF) 96 Page - Microchip Technology |
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PIC12LF1501 数据表(HTML) 96 Page - Microchip Technology |
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96 / 352 page  PIC16(L)F1503 DS40001607D-page 96 2011-2015 Microchip Technology Inc. 11.1 Alternate Pin Function The Alternate Pin Function Control (APFCON) register is used to steer specific peripheral input and output functions between different pins. The APFCON register is shown in Register 11-1. For this device family, the following functions can be moved between different pins. • SS •T1G •CLC1 • NCO1 • SDOSEL These bits have no effect on the values of any TRIS register. PORT and TRIS overrides will be routed to the correct pin. The unselected pin will be unaffected. 11.2 Register Definitions: Alternate Pin Function Control REGISTER 11-1: APFCON: ALTERNATE PIN FUNCTION CONTROL REGISTER U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 R/W-0/0 R/W-0/0 — — SDOSEL SSSEL T1GSEL — CLC1SEL NCO1SEL bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-6 Unimplemented: Read as ‘0’ bit 5 SDOSEL: Pin Selection bit 1 = SDO function is on RA4 0 = SDO function is on RC2 bit 4 SSSEL: Pin Selection bit 1 =SS function is on RA3 0 =SS function is on RC3 bit 3 T1GSEL: Pin Selection bit 1 = T1G function is on RA3 0 = T1G function is on RA4 bit 2 Unimplemented: Read as ‘0’ bit 1 CLC1SEL: Pin Selection bit 1 = CLC1 function is on RC5 0 = CLC1 function is on RA2 bit 0 NCO1SEL: Pin Selection bit 1 = NCO1 function is on RA4 0 = NCO1 function is on RC1 |
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