V

= I

R

OUT

LIMIT

LOAD

´

TLV1171

SBVS177 – APRIL 2012

www.ti.com

APPLICATION INFORMATION

The TLV1171 is a low quiescent current linear regulator designed for high-current applications. Unlike typical

high-current linear regulators, the TLV1171 consumes significantly less quiescent current. The device delivers

excellent line and load transient performance. The TLV1171 is low noise, and exhibits a very good power-supply

rejection ratio (PSRR). As a result, the device is ideal for high-current applications that require very sensitive

power-supply rails.

The TLV1171 regulator offers both current limit and thermal protection. The device operating junction

temperature range is –40°C to +125°C.

INPUT AND OUTPUT CAPACITOR REQUIREMENTS

For stability, 1.0-

μF ceramic capacitors are required at the output. Higher-valued capacitors improve transient

performance. X5R- and X7R-type ceramic capacitors are recommended because these capacitors have minimal

variation in value and equivalent series resistance (ESR) over temperature. Unlike traditional linear regulators

that need a minimum ESR for stability, the TLV1171 is ensured to be stable with no ESR. Therefore, cost-

effective ceramic capacitors can be used with this device. Effective output capacitance that takes bias,

temperature, and aging effects into consideration must be greater than 0.5

μF to ensure device stability.

Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1-

μF to

1.0-

μF, low-ESR capacitor across the IN and GND pins of the regulator. This capacitor counteracts reactive input

sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor may be

necessary if large, fast, rise-time load transients are anticipated, or if the device is not located physically close to

the power source. If source impedance is greater than 2

Ω, a 0.1-μF input capacitor may also be necessary to

ensure stability.

BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE

Input and output capacitors should be placed as close to the device pins as possible. To improve characteristic

ac performance such as PSRR, output noise, and transient response, it is recommended that the board be

designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of

the device. In addition, the output capacitor ground connection should be connected directly to the device GND

pin. Higher-value ESR capacitors may degrade PSRR performance.

INTERNAL CURRENT LIMIT

The TLV1171 internal current limit helps to protect the regulator during fault conditions. During current limit, the

output sources a fixed amount of current that is largely independent of the output voltage. In such a case, the

output voltage is not regulated and can be calculated by Equation 1:

(1)

The PMOS pass transistor dissipates [(VIN – VOUT) × ILIMIT] until thermal shutdown is triggered and the device

turns off. As the device cools down, it is turned on by the internal thermal shutdown circuit. If the fault condition

continues, the device cycles between current limit and thermal shutdown. See the Thermal Information section

for more details.

The PMOS pass element in the TLV1171 has a built-in body diode that conducts current when the voltage at

OUT exceeds the voltage at IN. This current is not limited; if extended reverse voltage operation is anticipated,

external limiting to 5% of the rated output current is recommended.

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