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PM6680A 数据表(PDF) 23 Page - STMicroelectronics |
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PM6680A 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 48 page ![]() PM6680A Device description 23/48 7.5 No-audible skip mode If SKIP pin is tied to VREF, a no-audible skip mode with a minimum switching frequency of 33 kHz is enabled. At light load condition, If there is not a new switching cycle within a 30 µs (typ.) period, a no-audible skip mode cycle begins. Figure 32. No audible skip mode The low side switch is turned on until the output voltage crosses about Vreg + 1 %. Then the high side MOSFET is turned on for a fixed on time period. Afterwards the low side switch is enabled until the inductor current reaches the zero-crossing threshold. This keeps the switching frequency higher than 33 kHz. As a consequence of the control, the regulated voltage can be slightly higher than Vreg (up to 1 % ). If, due to the load, the frequency is higher than 33 kHz, the device works like in skip mode. No-audible skip mode reduces audio frequency noise that may occur in pulse skip mode at very light loads, keeping the efficiency higher than in PWM mode. µ |
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