DATA BRIEF

For further information contact your local STMicroelectronics sales office.

January 2006

Rev 1

1/4

4

STLC2500C

Features

technology (see

support for several BT/WLAN coexistence

algorithms (i.e. 2/3/4-wire PTA, in a very

flexible and parametrical way to optimize voice

and data quality over Bluetooth and WLAN)

– Pitch-Period Error Concealment (PPEC) for

improved speech quality (in the vicinity of

interference)

– Tx output power up to 8 dBm

– Auto calibration (VCO, filters), no RF

calibration required in production

– Full EDR support and all BT1.2 errata

– All EDR data rates and packet types

through extended V1.2 feature support

– Adaptive Frequency Hopping (AFH)

– Faster connections through interlaced scan

– Extended SCO (eSCO) links

(up to 7 slaves) and scatternet capability

transport link

for 2 simultaneous SCO channels at 64Kbps

clock input and low power clock

(AHB-APB) bus configuration

– Fast UART up to 4Mbps for HCI

– SPI interface up to 6 Mbps for HCI

– PCM interface for voice

– WirelessLAN coexistence with 2, 3, 4 wires

– 19 programmable GPIOs

– Fast master I2C interface

– H4 and H5 HCI transport layer

– HCI proprietary commands and single HCI

command for patch/upgrade download

capacitors and one single antenna interface

power modes: sleep , deep sleep and

complete power down

Description

The STLC2500C is a single chip ROM-based

Bluetooth solution implemented in 0.13 µm ultra

low power, ultra low leakage CMOS technology

for mobile terminal applications requiring

integration up to HCI level. Patch RAM is

available, enabling multiple patches/upgrades.

The STLC2500C offers multiple interface options.

The radio has been designed specifically for

single chip requirements for minimal consumption

and BOM count.

WFBGA48 (4.5mm x 4.5 mmx 0.8 mm)

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