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TLV62565DBVR 数据表(PDF) 7 Page - Texas Instruments |
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TLV62565DBVR 数据表(HTML) 7 Page - Texas Instruments |
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7 / 26 page ![]() Current Limit Detect Control Logic Soft start Thermal Shutdown UVLO GM Gate Drive VIN GND FB Vref EN SW + _ DBG DBG PMOS NMOS Valley Current Detect Pulse Modulator Duty Detect SW Copyright © 2016, Texas Instruments Incorporated 7 TLV62565, TLV62566 www.ti.com SLVSBC1D – OCTOBER 2013 – REVISED OCTOBER 2016 Product Folder Links: TLV62565 TLV62566 Submit Documentation Feedback Copyright © 2013–2016, Texas Instruments Incorporated 9 Detailed Description 9.1 Overview The TLV62565/6 device family includes two high-efficiency synchronous step-down converters. Each device operates with an adaptive on-time control scheme, which is able to dynamically adjust the on-time duration based on the input voltage and output voltage so that it can achieve relative constant frequency operation. The device operates at typically 1.5-MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. Based on the VIN/VOUT ratio, a simple circuit sets the required on time for the high-side MOSFET. It makes the switching frequency relatively constant regardless of the variation of input voltage, output voltage, and load current. At the beginning of each switching cycle, the high-side switch is turned on and the inductor current ramps up to a peak current that is defined by on time and inductance. In the second phase, once the on time expires, the high-side switch is turned off while the low-side switch is turned on. The current through the inductor then decays until triggering the valley current level determined by the output of the error amplifier. Once this occurs, the on timer is set to turn the high-side switch back on again and the cycle is repeated. The TLV62565/6 device family offers excellent load transient response with a unique fast response constant on- time valley current mode. The switching frequency changes during load transition so that the output voltage comes back in regulation faster than a traditional fixed PWM control scheme. Internal loop compensation is integrated which simplifies the design process while minimizing the number of external components. At light load currents the device automatically operates in Power Save Mode with pulse frequency modulation (PFM). 9.2 Functional Block Diagrams Figure 4. TLV62565 Functional Block Diagram |
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