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IP175A LF
Preliminary Data Sheet
39/60
February 20, 2006
Copyright © 2004, IC Plus Corp.
IP175A LF-DS-R08
ROM
MII
Pin name
Description
Default
EEPROM registers 07H
7[7:0]
--
--
Reserved
8’b0
ROM
MII
Pin name
Description
(Transceiver control register 1)
Default
EEPROM registers 08H
8[7:0]
--
--
Reserved
8’b0
ROM
MII
Pin name
Description
(Transceiver control register 2)
Default
EEPROM registers 09H
9[7:2]
--
--
Reserved
6’b0
9.1
--
--
Savepw_a_en,
Save power mode
Digital sends wake up signal to analog before sending FLP if
this function is active.
0: disable, 1: enable
The default value must be adopted for normal operation.
1
9.0
--
--
MDI/MDI-X enable
1: enable (default), 0:disable
This function should be tuned on for normal operation.
Disable MDIX is inhibited.
1
ROM
MII
Pin name
Description
(Transceiver verification register 1)
Default
EEPROM registers 0AH
A[7:6]
--
--
Reserved
00
A.5
--
--
Reserved
0
A.4
--
--
Reserved
0
A.3
--
--
Reserved
0
A.1
--
--
Reserved
0
A.0
--
--
Reserved
0
ROM
MII
Pin name
Description
(Transceiver verification register 2)
Default
EEPROM registers 0BH
B.7
--
--
Reserved
1’b0
B.6
--
--
Reserved
1’b0
B.5
--
--
Reserved
0