IP178C/IP178C LF/IP178CH/IP178CH LF
Datasheet
50/93
June 21, 2007
Copyright © 2004, IC Plus Corp.
IP178Cx-DS-R12
PHY
MII
ROM
R/W
Description
Default
MII status register (address 01)
0
1.15
--
RO
100Base-T4 capable
1 = 100Base-T4 capable
0 = not 100Base-T4 capable
IP178C/IP178CH does not support 100Base-T4. This bit is
fixed to be 0.
0
0
1.14
--
RO
100Base-X full duplex Capable
1 = 100Base-X full duplex capable
0 = not 100Base-X full duplex capable
The default of this bit will change depend on the external
setting of IP178C/IP178CH. If external pin setting without
100Base-X full duplex support, then this bit will change
default to logic 0.
1
0
1.13
--
RO
100Base-X half duplex Capable
1 = 100Base-X half duplex capable
0 = not 100Base-X half duplex capable
The default of this bit will change depend on the external
setting of IP178C/IP178CH. If external pin setting without
100Base-X half duplex support, then this bit will change
default to logic 0
1
0
1.12
--
RO
10Base-T full duplex Capable
1 = 10Base-T full duplex capable
0 = not 10Base-T full duplex capable
The default of this bit will change depend on the external
setting of IP178C/IP178CH. If external pin setting without
100Base-T full duplex support, then this bit will change default
to logic 0
1
0
1.11
--
RO
10Base-T half duplex Capable
1 = 10Base-T half duplex capable
0 = not 10Base-T half duplex capable
The default of this bit will change depend on the external
setting of IP178C/IP178CH. If external pin setting without
100Base-X full duplex support, then this bit will change
default to logic 0
1
0
1[10:7]
--
RO
Reserved
Ignore on read
-
0
1.6
--
RO
MF preamble Suppression
1 = preamble may be suppressed
0 = preamble always required
1
0
1.5
--
RO
Auto-Negotiation Complete
1 = Auto-Negotiation complete
0 = Auto-Negotiation in progress
When read as logic 1, indicates that the Auto-Negotiation
process has been completed, and the contents of register 4
and 5 are valid. When read as logic 0, indicates that the
Auto-Negotiation process has not been completed, and the
contents
of
register
4
and
5
are
meaningless.
If
Auto-Negotiation is disabled (bit 0.12 set to logic 0), then this
bit will always read as logic 0.
0
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