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ADS5270IPFP 数据表(PDF) 4 Page - Texas Instruments

部件名 ADS5270IPFP
功能描述  8-Channel, 12-Bit, 40MSPS Analog-to-Digital Converter with Serial LVDS Interface
PDF  31 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

ADS5270IPFP 数据表(HTML) 4 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS
ADS5270
SBAS293F – JANUARY 2004 – REVISED JANUARY 2009............................................................................................................................................... www.ti.com
TMIN = –40°C and TMAX = +85°C. Typical values are at TA = +25°C, clock frequency = maximum specified, 50% clock duty
cycle, AVDD = 3.3V, LVDD = 3.3V, –1dBFS, ISET = 56.2kΩ, internal voltage reference, and LVDS buffer current at 3.5mA per
channel, unless otherwise noted.
ADS5270
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
No Missing Codes
Tested
DNL Differential Nonlinearity
fIN = 5MHz
–0.9
±0.5
+0.9
LSB
INL Integral Nonlinearity
fIN = 5MHz
–2.0
±0.6
+2.0
LSB
Offset Error(1)
–0.75
+0.75
%FS
Offset Temperature Coefficient
±6
ppm/°C
Fixed Attenuation in Channel(2)
1.5
%FS
Fixed Attenuation Matching Across Channels
0.01
0.2
dB
Gain Error/Reference Error(3)
VREFT – VREFB
–2.5
±1.0
+2.5
%FS
Gain Error Temperature Coefficient
±20
ppm/°C
POWER REQUIREMENTS(4)
Internal Reference
Power Dissipation
Analog Only (AVDD)
716
760
mW
Output Driver (LVDD)
172
188
mW
Total Power Dissipation
888
948
mW
External Reference
Power Dissipation
Analog Only (AVDD)
650
mW
Output Driver (LVDD)
172
mW
Total Power Dissipation
822
mW
Power-Down
Clock Running
90
mW
REFERENCE VOLTAGES
VREFT Reference Top (internal)
1.9
1.95
2.0
V
VREFB Reference Bottom (internal)
0.9
0.95
1.0
V
VCM Common-Mode Voltage
1.4
1.45
1.5
V
VCM Output Current
(5)
±50mV Change in Voltage
±2.0
mA
VREFT Reference Top (external)
1.825
1.95
2.0
V
VREFB Reference Bottom (external)
0.9
0.95
1.075
V
External Reference Common-Mode
VCM ± 50mV
V
External Reference Input Current(6)
1.0
mA
(1)
Offset error is the deviation of the average code from mid-code with –1dBFS sinusoid from ideal mid-code (2048). Offset error is
expressed in terms of % of full-scale.
(2)
Fixed attenuation in the channel arises due to a fixed attenuation in the sample-and-hold amplifier. When the differential voltage at the
analog input pins are changed from –VREF to +VREF, the swing of the output code is expected to deviate from the full-scale code
(4096LSB) by the extent of this fixed attenuation. NOTE: VREF is defined as (REFT – REFB).
(3)
The reference voltages are trimmed at production so that (VREFT – VREFB) is within ± 25mV of the ideal value of 1V. This specification
does not include fixed attenuation.
(4)
Supply current can be calculated from dividing the power dissipation by the supply voltage of 3.3V.
(5)
VCM provides the common-mode current for the inputs of all eight channels when the inputs are ac-coupled. The VCM output current
specified is the additional drive of the VCM buffer if loaded externally.
(6)
Average current drawn from the reference pins in the external reference mode.
4
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Copyright © 2004–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS5270



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