6 Detailed Description

6.1 Overview

The eight flip-flops of the ’AC374 devices are D-type edge-triggered flip-flops. On the positive transition of the

clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the

bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines

in bus-organized systems without need for interface or pullup components.

OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while

the outputs are in the high-impedance state.

The RCA-CD54/74AC374 and CD54/74AC534 and the CD54/74ACT374 and CD54/74ACT534 octal D-type,

3-state, positive-edge triggered flip-flops use the RCA ADVANCED CMOS technology. The eight flip-flops enter

data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) controls

the 3-state outputs and is independent of the register operation. When the Output Enable (OE) is HIGH, the

outputs are in the high-impedance state. The CD54/74AC/ACT374 and CD54/74AC/ACT534 share the same

pin configurations, but the CD54/74AC/ACT374 outputs are non-inverted while the CD54/74AC/ACT534 devices

have inverted outputs. (For flow-through pin configurations, see CD54/74AC/ACT564 and CD54/74AC/ACT574.)

The CD74AC/ACT374 and CD74AC/ACT534 are supplied in 20-lead dual-in-line plastic packages (E suffix)

and in 20-lead dual-in-line small-outline plastic packages (M suffix). Both package types are operable over the

following temperature ranges: Commercial (0 to 70°C); Industrial (-40 to +85°C); and Extended Industrial/Military

(-55 to +125°C).

The CD54AC/ACT374 and CD54AC/ACT534, available in chip form (H suffix), are operable over the -55 to

+125°C temperature range.

6.2 Functional Block Diagram

6.3 Device Functional Modes

Table 6-1. Truth Table

INPUTS

OUTPUTS

374

534

OE

CP

Dn

Qn

Qn

L

H

H

L

L

L

L

H

L

L

X

QO

QO

H

X

X

Z

Z

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CD74AC374, CD54AC374, CD54ACT374, CD74ACT374, CD74AC534

SCHS290A – DECEMBER 1998 – REVISED MARCH 2024

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