Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

Time (ns)

0

0.5

1

1.5

2

-0.4

-0.2

0.0

0.2

0.4

11

TUSB211, TUSB211I

www.ti.com

SLLSEO0D – MAY 2015 – REVISED OCTOBER 2017

Product Folder Links: TUSB211

Submit Documentation Feedback

Copyright © 2015–2017, Texas Instruments Incorporated

Figure 5. EQ Level 1

Figure 6. EQ Level 2

Figure 7. EQ Level 3

9 Power Supply Recommendations

On power up, the interaction of the RSTN pin and power on ramp could result in digital circuits not being set

correctly. The device should not be enabled until the power on ramp has settled to 3 V or higher to guarantee a

correct power on reset of the digital circuitry. If RSTN cannot be held low by microcontroller or other circuitry until

the power on ramp has settled, then an external capacitor from the RSTN pin to GND is required to hold the

device in the low power reset state.

The RC time constant should be larger than five times of the power on ramp time (0 to VCC). With a typical

internal pullup resistance of 500 kΩ, the recommended minimum external capacitance is calculated as:

[Ramp Time x 5] ÷ [500 kΩ]

(1)