TSC2000IPWR datasheet(30/38 Pages) TI2

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TSC2000

SBAS257

FIGURE 21. Battery Measurement Functional Block Diagram.

FIGURE 22. VBAT1 Measurement Process.

FIGURE 23. VBAT2 Measurement Process.

Host Writes

A/D Converter

Control Register

Start Clock

Battery Input 2

Done

Yes

Is Data

Averaging Done

Store Battery Input 2

in BAT2 Register

Power Down

A/D Converter

Power Up

A/D Converter

Power Up Reference

Convert

Battery Input 2

Issue Data Available

Power Down Reference

Turn Off Clock

Host Writes

A/D Converter

Control Register

Start Clock

Battery Input 1

Done

Yes

Is Data

Averaging Done

Store Battery Input 1

in BAT1 Register

Power Down

A/D Converter

Power Up

A/D Converter

Power Up Reference

Convert

Battery Input 1

Issue Data Available

Power Down Reference

Turn Off Clock

BAT1

7.5k

Ω

2.5k

Ω

DC/DC

Converter

Battery

0.5V

6.0V

0.125V to 1.5V

2.7V

OPERATION—BATTERY MEASUREMENT

An added feature of the TSC2000 is the ability to monitor the

battery voltage on the other side of a voltage regulator (DC/

DC converter), as shown in Figure 21. The VBAT1 input is

divided down by 4 so that an input range of 0.5V to 6.0V can

be measured. Because of the division by 4, this input range

would be represented as 0.125V to 1.5V to the A/D con-

verter.

The VBAT2 input is divided down by 2, so it accommodates an

input range of 0.5V to 3.0V, which is represented to the A/D

converter as 0.25V to 1.5V. This smaller divider ratio allows

for increased resolution. Note that the VBAT2 input pin can

withstand up to 6V, but this input will only provide accurate

measurements within the 0.5V to 3.0V range.

For both battery inputs, the dividers are ON only during the

sampling of the battery input, in order to minimize power

consumption.

Flowcharts which detail the process of making a battery input

reading are shown in Figures 22 and 23.

The time needed to make temperature, auxiliary, or battery

measurements is given by:

(7)

2.625 s + t

READING

REF

AVG

BITS

CONV

=µ

•









where tREF is the reference delay time as given in Table XVII.

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