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STM32L412R8I6P 数据表(PDF) 33 Page - STMicroelectronics |
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STM32L412R8I6P 数据表(HTML) 33 Page - STMicroelectronics |
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33 / 192 page  DS12469 Rev 4 33/192 STM32L412xx Functional overview 49 interrupt is generated if enabled. LSE failure can also be detected and generated an interrupt. • Clock-out capability: – MCO: microcontroller clock output: it outputs one of the internal clocks for external use by the application. Low frequency clocks (LSI, LSE) are available down to Stop 1 low power state. – LSCO: low speed clock output: it outputs LSI or LSE in all low-power modes down to Standby mode. LSE can also be output on LSCO in Shutdown mode. LSCO is not available in VBAT mode. Several prescalers allow to configure the AHB frequency, the high speed APB (APB2) and the low speed APB (APB1) domains. The maximum frequency of the AHB and the APB domains is 80 MHz. |
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