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STM32L412R8T3PTR 数据表(PDF) 136 Page - STMicroelectronics |
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STM32L412R8T3PTR 数据表(HTML) 136 Page - STMicroelectronics |
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136 / 192 page  Electrical characteristics STM32L412xx 136/192 DS12469 Rev 4 Figure 28. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 72: NRST pin characteristics. Otherwise the reset will not be taken into account by the device. 3. The external capacitor on NRST must be placed as close as possible to the device. 6.3.16 Extended interrupt and event controller input (EXTI) characteristics The pulse on the interrupt input must have a minimal length in order to guarantee that it is detected by the event controller. 6.3.17 Analog switches booster Table 73. EXTI Input Characteristics(1) 1. Guaranteed by design. Symbol Parameter Conditions Min Typ Max Unit PLEC Pulse length to event controller -20 - - ns Table 74. Analog switches booster characteristics(1) 1. Guaranteed by design. Symbol Parameter Min Typ Max Unit VDD Supply voltage 1.62 - 3.6 V tSU(BOOST) Booster startup time - - 240 µs IDD(BOOST) Booster consumption for 1.62 V ≤ VDD ≤ 2.0 V -- 250 µA Booster consumption for 2.0 V ≤ VDD ≤ 2.7 V -- 500 Booster consumption for 2.7 V ≤ VDD ≤ 3.6 V -- 900 |
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