OPA693IDBVT datasheet(21/33 Pages) TI2

21 / 33 page

OPA693

SBOS285A

www.ti.com

Minimizing the resistance seen by the noninverting input will

minimize the output DC error. For improved DC precision in

a wideband low-gain amplifier, consider the OPA842 where

a bipolar input is acceptable (low source resistance) or the

OPA656 where a JFET input is required.

DISABLE OPERATION

The OPA693 provides an optional disable feature that can be

used to reduce system power. If the V

DIS control pin is left

unconnected, the OPA693 will operate normally. This shut-

down is intended only as a power-savings feature. Forward

path isolation when disabled is very good for small signals for

gains of +1 or +2. Large-signal isolation is not ensured. Using

this feature to multiplex two or more outputs together is not

recommended. Large signals applied to the disabled output

stages can turn on parasitic devices degrading signal linear-

ity for the desired channel.

Turn-on time is very quick from the shutdown condition,

typically < 60ns. Turn-off time is strongly dependent on the

selected gain configuration and load, but is typically 3

µs for

the circuit of Figure 1.

To shutdown, the control pin must be asserted low. This logic

control is referenced to the positive supply, as shown in the

simplified circuit of Figure 15.

The shutdown feature for the OPA693 is a positive supply

referenced, current-controlled, interface. Open collector (or

drain) interfaces are most effective, as long as the controlling

logic can sustain the resulting voltage (in the open mode)

that will appear at the V

DIS pin. That voltage will be one diode

below the positive supply voltage applied to the OPA693. For

voltage output logic interfaces, the on/off voltage levels

described in the Electrical Characteristics apply only for a

+5V positive supply on the OPA693. An open-drain interface

is recommended for shutdown operation using a higher

positive supply for the OPA693 and/or logic families with

inadequate high-level voltage swings.

THERMAL ANALYSIS

The OPA693 does not require heatsinking or airflow in most

applications. Maximum desired junction temperature sets the

maximum allowed internal power dissipation as described

here. In no case should the maximum junction temperature

be allowed to exceed 150

°C.

Operating junction temperature (TJ) is given by TA + PD × θJA.

The total internal power dissipation (PD) is the sum of

quiescent power (PDQ) and additional power dissipated in the

output stage (PDL) to deliver load power. Quiescent power is

simply the specified no-load supply current times the total

supply voltage across the part. PDL will depend on the

required output signal and load but would, for a grounded

resistive load, be at a maximum when the output is fixed at

a voltage equal to 1/2 either supply voltage (for equal bipolar

supplies). Under this worst-case condition, PDL = VS2/(4 × RL)

where RL includes feedback network loading. This is the

absolute highest power that can be dissipated for a given RL.

All actual applications will dissipate less power in the output

stage.

Note that it is the power in the output stage and not into the

load that determines internal power dissipation.

As a worst-case example, compute the maximum TJ using an

OPA693IDBV (SOT23-6 package) in the circuit of Figure 1

operating at the maximum specified ambient temperature of

+85

°C and driving a grounded 100Ω load. Maximum internal

power is:

PD = 10V × 14.1mA + 52 /(4 × (100Ω+|| 600Ω)) = 214mW

Maximum TJ = +85°C + (0.21W × 150°C/W) = 117°C.

All actual applications will operate at a lower junction tem-

perature than the 117

°C computed above. Compute your

actual output stage power to get an accurate estimate of

maximum junction temperature, or use the results shown

here as an absolute maximum.

25k

Ω

110k

Ω

15k

Ω

Control

–V

DIS

Figure 15. Simplified Disable Control Circuit.

In normal operation, base current to Q1 is provided through

the 110k

Ω resistor while the emitter current through the 15kΩ

resistor sets up a voltage drop that is inadequate to turn on

the two diodes in Q1’s emitter. As V

DIS is pulled LOW,

additional current is pulled through the 15k

Ω, eventually

turning on these two diodes (

≈80µA). At this point, any further

current pulled out of V

DIS goes through those diodes holding

the emitter-base voltage of Q1 at approximately 0V. This

shuts off the collector current out of Q1, turning the amplifier

off. The supply current in the shutdown mode is only that

required to operate the circuit of Figure 15.

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