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PCF8883US/7EA/1 数据表(PDF) 6 Page - NXP Semiconductors |
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PCF8883US/7EA/1 数据表(HTML) 6 Page - NXP Semiconductors |
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6 / 35 page ![]() PCF8883 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 4.1 — 14 September 2016 6 of 35 NXP Semiconductors PCF8883 Capacitive touch/proximity switch with auto-calibration 8. Functional description Figure 4 and Figure 5 show the functional principle of the PCF8883. The discharge time (tdch) of a chip-internal RC timing circuit, to which the external sensing plate is connected via pin IN, is compared to the discharge time (tdch(ref)) of a second chip-internal reference RC timing circuit. Both RC timing circuits are periodically charged from VDD(INTREGD) via identical switches and then discharged via a resistor to ground (VSS). Both switches are synchronized. The charge-discharge cycle is governed by the sampling rate (fs). If the voltage of one of the RC timing circuits falls below the internal reference voltage Vref, the respective comparator output becomes LOW. The logic following the comparators determines which comparator switches first. If the upper (reference) comparator switches, then a pulse is given on CUP. If the lower (input) comparator switches first, then a pulse is given on CDN (see Figure 4). The pulses control the charge on the external capacitor CCPC on pin CPC. Every time a pulse is given on CUP, capacitor CCPC is charged from VDD(INTREGD) for a fixed time causing the voltage on CCPC to rise. Likewise when a pulse occurs on CDN, capacitor CCPC is connected to a current sink to ground for a fixed time causing the voltage on CCPC to fall. Fig 4. Functional diagram of the sensor logic |
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