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SN74LVC4245APWR.B 数据表(PDF) 13 Page - Texas Instruments

部件名 SN74LVC4245APWR.B
功能描述  SN74LVC4245A Octal Bus Transceiver and 3.3-V to 5-V Shifter With 3-State Outputs
PDF  26 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

SN74LVC4245APWR.B 数据表(HTML) 13 Page - Texas Instruments

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10 Power Supply Recommendations
10.1 Power-Up Consideration
TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up
sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other
anomalies caused by improperly biased device terminals. Take these precautions to guard against such power-
up problems:
1. Connect ground before any supply voltage is applied.
2. Power up the control side of the device (VCCA for all four of these devices).
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA.
4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus),
ramp it with VCCA. Otherwise, keep DIR low.
For more information, refer to the Voltage-Level-Translation Devices application note.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices, inputs should not float. In many cases, functions or parts of functions of
digital logic devices are unused. Some examples are when only two inputs of a triple-input AND gate are used,
or when only 3 of the 4-buffer gates are used. Such input pins should not be left unconnected because the
undefined voltages at the outside connections result in undefined operational states.
Specified in Figure 11-1 are rules that must be observed under all circumstances. All unused inputs of digital
logic devices must be connected to a high or low bias to prevent them from floating. The logic level that should
be applied to any particular unused input depends on the function of the device. Generally they will be tied to
GND or VCC, whichever makes more sense or is more convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Output
Input
Unused Input
Figure 11-1. Layout Diagram
www.ti.com
SN74LVC4245A
SCAS375J – MARCH 1994 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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