TLK1501

0.6 TO 1.5 GBPS TRANSCEIVER

SLLS428F − JUNE 2000 − REVISED JANUARY 2004

13

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

synchronization and initialization (continued)

The state of the receive data bus, status terminals, and serial inputs during the link acquisition process is

illustrated in Figure 8 and Figure 9.

ACQ

Rx_DV

RDx[0−15]

SYNC

DINRxP,

D0−D15

IDLE or Carrier

Extend

IDLE or Carrier

Extend

IDLE or Carrier

Extend

DINRxN

D0−D15

IDLE or Carrier

Extend

IDLE or Carrier

Extend

XXXXXXXXXXXXXXXXXXX

RESET

(Internal Signal)

Rx_ER

Figure 8. Receive Side Timing Diagram (Idle or Carrier Extend)

ACQ

Rx_DV

RDx[0−15]

SYNC

DINRxP,

D0−D15

DINRxN

D0−D15

Valid Data or

Error Prop

XXXXXXXXXXXXXXXXXXX

RESET

(Internal Signal)

IDLE

D0−D15

D0−D15

Valid Data or

Error Prop

Rx_ER

Figure 9. Receive Side Timing Diagram (Valid Data or Error Propagation)

redundant port operation

The TLK1501 allows users to design a redundant port by connecting receive data bus terminals from two

TLK1501 devices together. Asserting the LCKREFN to a low state causes the receive data bus terminals, the

RXD[0:15], RX_CLK and RX_ER, and RX_DV/LOS to go to a high-impedance state.

PRBS verification

The TLK1501 also has a built-in BERT function in the receiver side that is enabled by the PRBSEN. It can check

for errors and report the errors by forcing the RX_ER/PRBSPASS terminal low.