PL133-67

Low-Power 2.25V to 3.63V DC to 150MHz 1:6 Fanout Buffer IC

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/18/11 Page 1

FEATURES

 1:6 LVCMOS output fanout buffer for DC to 150MHz

 8mA Output Drive Strength

 Low power consumption for portable applications

 Low input-output delay

 Output-Output skew less than 250ps

 Low Additive Phase Jitter of 60fs RMS

 2.5V to 3.3V, ±10% operation

 Operating temperature range from -40°C to 85°C

 Available in 16-Pin SOP GREEN/RoHS package

DESCRIPTION

The PL133-67 is an advanced fanout buffer design for

high performance, low-power, small form factor applica-

tions. The PL133-67 accepts a reference clock input from

DC to 150MHz and provides 6 outputs of the same fre-

quency.

The PL133-67 is offered in a TSSOP-16L package and it

offers the best phase noise, additive jitter performance,

and lowest power consumption of any comparable IC.

The PL133-67 outputs can be disabled to a high imped-

ance (tri-state) by pulling low the OE pin. When the OE pin

is high, the outputs are enabled and follow the REF input

signal. When the OE pin is left open, a pull-up resistor on

the chip will default the OE pin to logic 1 so the outputs are

enabled.

BLOCK DIAGRAM AND PACKAGE PINOUT

REF

CLK1

CLK2

CLK3

CLK4

CLK5

CLK6

1

REF

DNC

CLK0

VDD

DNC

DNC

CLK5

VDD

GND

CLK4

CLK3

GND

10

11

12

13

14

15

16

9

8

7

6

5

4

3

2

OE^

CLK2

CLK1

GND

TSSOP-16L

OE