USB3300 datasheet(13/55 Pages) SMSC

13 / 55 page

Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface

Datasheet

SMSC USB3300

Revision 1.08 (11-07-07)

DATASHEET

VDD3.3

Power

N/A

Analog 3.3 volt supply. A 0.1uF low ESR bypass

capacitor connected to the ground plane of the PCB

is recommended.

REG_EN

I/O,

CMOS,

Pull-low

N/A

On-Chip 1.8V regulator enable. Connect to ground to

disable both of the on chip (VDDA1.8 and VDD1.8)

regulators. When regulators are disabled:

External 1.8V must be supplied to VDDA1.8 and

VDD1.8 pins. When the regulators are disabled,

VDDA1.8 may be connected to VDD1.8 and a

bypass capacitor (0.1uF recommended) should be

connected to each pin.

The voltage at VDD3.3 must be at least 2.64V (0.8

* 3.3V) before voltage is applied to VDDA1.8 and

VDD1.8.

RBIAS

Analog,

CMOS

N/A

External 12KΩ +/- 1% bias resistor to ground.

GND FLAG

Ground

N/A

Ground. The flag must be connected to the ground

plane with a via array under the exposed flag. This

is the main ground for the IC.

Table 3.1 USB3300 Pin Definitions 32-Pin QFN Package (continued)

NAME

DIRECTION,

TYPE

ACTIVE

LEVEL

DESCRIPTION

USB3300 数据表(PDF) 13 Page - SMSC Corporation

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