L6563 - L6563A

Application information

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The third communication line is the PWM_STOP pin (pin 9), which works in conjunction with

the RUN pin (pin 10). The purpose of the PWM_STOP pin is to inhibit the PWM activity of

both the PFC stage and the cascaded DC-DC converter. The pin is an open collector,

normally open, that goes low if the device is disabled by a voltage lower than 0.52V on the

RUN pin. It is important to point out that this function works correctly in systems where the

PFC stage is the master and the cascaded DC-DC converter is the slave or, in other words,

where the PFC stage starts first, powers both controllers and enables/disables the operation

of the DC-DC stage.

This function is quite flexible and can be used in different ways. In systems comprising an

auxiliary converter and a main converter (e.g. desktop PC's silver box or hi-end LCD-TV),

where the auxiliary converter also powers the controllers of the main converter, the pin RUN

can be used to start and stop the main converter. In the simplest case, to enable/disable the

PWM controller the PWM_STOP pin can be connected to either the output of the error

use of the soft-start pin allows the designer to delay the start-up of the DC-DC stage with

respect to that of the PFC stage, which is often desired. An underlying assumption in order

for that to work properly is that the UVLO thresholds of the PWM controller are certainly

higher than those of the L6563/A.

Figure 43. Interface circuits that let DC-DC converter’s controller IC disable the L6563/A at light

load

L5991/A

ST-BY

4

16

27

kΩ

Vref

L6563

PFC_OK

7

100

kΩ

150

kΩ

150

kΩ

47

kΩ

100 nF

BC547

BC547

BC557

L5991/A

ST-BY

4

16

27

kΩ

Vref

L6563

Vcc

14

100

kΩ

150

kΩ

150

kΩ

15

kΩ

100 nF

BC557

BC547

BC557

100 nF

Supply_Bus

L6668

PFC_STOP

14

16

Vcc

BC557

L6563

L6563A

Vcc

14

8.2 V

L6563

L6563A

(RUN)

PFC_OK

BC547

L6668

14 PFC_STOP

7

(10)

8

VREF

L6599

PFC_STOP

14

L6563

L6563A

(RUN)

PFC_OK

7

(10)