STM32MP151AAB3T datasheet(145/245 Pages) STMICROELECTRONICS

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DS12500 Rev 1

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STM32MP151A

Electrical characteristics

228

Figure 16. High-speed external clock source AC timing diagram (analog bypass)

Low-speed external user clock generated from an external source

In bypass mode the LSE oscillator is switched off and the input pin is a standard I/O. The

external clock signal has to respect the Table 48: I/O static characteristics. However, the

recommended clock input waveform is shown in Figure 17.

tr/tf(HSE)

Rise and Fall time

(10% to 90% threshold levels of the

input peak-to-peak amplitude)

TBD

I(HSE)

Power consumption

TBD(7)

TBD(8)

µA

1. Guaranteed by design.

2. Guaranteed by design with a square wave signal (@25 °C, VDD=3.3 V /VPP = 400 mV / VDC=1 V) where

VDC is the DC component of the input signal.

3. Guaranteed by design with a square wave signal (@25 °C, VDD=1.6 V /VPP = 200 mV / VDC=0.8 V) where

VDC is the DC component of the input signal.

4. minimum peak-to-peak amplitude (@25 °C, 0.1<VDC<VDD-0.1 V) where VDC is the DC component of the

input signal.

5. tSU(HSE) is the startup time measured from the moment it is enabled (by software) to a stabilized analog

bypass clock interface is reached. This value is measured @125 °C with 200 mV peak-to-peak amplitude.

6. Maximum start-up time is obtained @125 °C with 200 mV peak-to-peak amplitude.

7. with a sine wave signal (@25 °C, VDD=3.3 V /VPP = 400 mV / VDC=0.4 V) where VDC is the DC component

of the input signal.

8. with a sine wave signal (@125 °C, VDD=3.6 V /VPP = 800 mV / VDC=1.8 V) where VDC is the DC

component of the input signal.

Table 29. High-speed external user clock characteristics (analog bypass)(1)

Symbol

Parameter

Min

Typ

Max

Unit

MSv47498V1

VHSE

THSE

VPP

STM32

OSC_IN

fHSE_ext

tr(HSE)

90%

10%

External

clock source

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