8 Detailed Description

8.1 Overview

This device contains four independent 2-input NAND gates with open-drain outputs and Schmitt-trigger inputs.

Each gate performs the Boolean function Y = A ● B in positive logic.

8.2 Functional Block Diagram

One of Four Channels

xA

xB

xY

8.3 Feature Description

8.3.1 Open-Drain CMOS Outputs

This device includes open-drain CMOS outputs. Open-drain outputs can only drive the output low. When in the

high logical state, open-drain outputs will be in a high-impedance state. The drive capability of this device may

create fast edges into light loads so routing and load conditions should be considered to prevent ringing.

Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without

being damaged. It is important for the output power of the device to be limited to avoid damage due to

overcurrent. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all

times.

When placed into the high-impedance state, the output will neither source nor sink current, with the exception of

minor leakage current as defined in the Electrical Characteristics table. In the high-impedance state, the output

voltage is not controlled by the device and is dependent on external factors. If no other drivers are connected to

the node, then this is known as a floating node and the voltage is unknown. A pull-up resistor can be connected

to the output to provide a known voltage at the output while it is in the high-impedance state. The value of the

resistor will depend on multiple factors, including parasitic capacitance and power consumption limitations.

Typically, a 10 kΩ resistor can be used to meet these requirements.

Unused open-drain CMOS outputs should be left disconnected.

8.3.2 CMOS Schmitt-Trigger Inputs

Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input

capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum

input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the

Electrical Characteristics, using ohm's law (R = V ÷ I).

The Schmitt-trigger input architecture provides hysteresis as defined by ΔV T in the Electrical Characteristics,

which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much slower

than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the inputs

slowly will also increase dynamic current consumption of the device. For additional information regarding

Schmitt-trigger inputs, please see Understanding Schmitt Triggers.

SN74HCS03

SCLS777A – JUNE 2020 – REVISED OCTOBER 2020

www.ti.com

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