CDx4AC00 Quadruple 2-Input Positive-nand Gates

1 Features

• AC types feature 1.5V to 5.5V operation and

balanced noise immunity at 30% of the supply

voltage

• Speed of bipolar F, AS, and S, with significantly

reduced power consumption

• Balanced propagation delays

• ±24mA output drive current

– Fanout to 15 F devices

• SCR-latchup-resistant CMOS process and circuit

design

• Exceeds 2kV ESD protection per MIL-STD-883,

method 3015

2 Description

The ‘AC00 devices contain four independent 2-input

NAND gates. Each gate performs the Boolean

function of Y = A • B or Y = A + B in positive logic.

Device Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

CDx4AC00

D (SOIC, 14)

8.65mm × 6mm

8.65mm × 3.9mm

N (PDIP, 14)

19.3mm × 9.4mm

19.3mm × 6.35mm

J (CDIP, 14)

19.56mm × 7.9mm

19.56mm × 6.67mm

(1)

For more information, see Section 10.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Logic Diagram, Each Gate (Positive Logic)

CD54AC00, CD74AC00

SCHS303D – JANUARY 2001 – REVISED JULY 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION

DATA.