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CD54HC00J 数据表(PDF) 2 Page - Texas Instruments

部件名 CD54HC00J
功能描述  CDx4HC00 Quadruple 2-Input NAND Gates
PDF  28 Pages
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制造商  TI2 [Texas Instruments]
网页  https://www.ti.com
标志 TI2 - Texas Instruments

CD54HC00J 数据表(HTML) 2 Page - Texas Instruments

  CD54HC00J Datasheet HTML 1Page - Texas Instruments CD54HC00J Datasheet HTML 2Page - Texas Instruments CD54HC00J Datasheet HTML 3Page - Texas Instruments CD54HC00J Datasheet HTML 4Page - Texas Instruments CD54HC00J Datasheet HTML 5Page - Texas Instruments CD54HC00J Datasheet HTML 6Page - Texas Instruments CD54HC00J Datasheet HTML 7Page - Texas Instruments CD54HC00J Datasheet HTML 8Page - Texas Instruments CD54HC00J Datasheet HTML 9Page - Texas Instruments Next Button
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Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
Pin Functions.................................................................... 3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings ....................................... 4
6.2 ESD Ratings .............................................................. 4
6.3 Recommended Operating Conditions ........................4
6.4 Thermal Information ...................................................5
6.5 Electrical Characteristics ............................................5
6.6 Switching Characteristics ...........................................6
6.7 Operating Characteristics .......................................... 6
6.8 Typical Characteristics................................................ 6
7 Parameter Measurement Information............................ 7
8 Detailed Description........................................................8
8.1 Overview..................................................................... 8
8.2 Functional Block Diagram........................................... 8
8.3 Balanced CMOS Push-Pull Outputs........................... 8
8.4 Standard CMOS Inputs...............................................8
8.5 Clamp Diode Structure................................................8
8.6 Device Functional Modes............................................9
9 Application and Implementation.................................. 10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
10 Power Supply Recommendations..............................13
11 Layout........................................................................... 13
11.1 Layout Guidelines................................................... 13
11.2 Layout Example...................................................... 13
12 Device and Documentation Support..........................14
12.1 Documentation Support.......................................... 14
12.2 Receiving Notification of Documentation Updates..14
12.3 Support Resources................................................. 14
12.4 Trademarks.............................................................14
12.5 Electrostatic Discharge Caution..............................14
12.6 Glossary..................................................................14
13 Mechanical, Packaging, and Orderable
Information.................................................................... 15
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (September 2003) to Revision D (January 2021)
Page
• Updated to new data sheet format......................................................................................................................1
• HCT device moved to new data sheet (SCHS398)............................................................................................ 1
• RθJA increased for the D package from 86 to 133.6 ℃/W and decreased for the N package from 80 to 69.5
℃/W....................................................................................................................................................................5
CD54HC00, CD74HC00
SCHS116D – JANUARY 1998 – REVISED JANUARY 2021
www.ti.com
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: CD54HC00 CD74HC00



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