UVLO

LM5035C

Disable Output

Drivers

Disable VCC and REF

Regulators

OVP

STANDBY

R2

R1

R3

5V

1.25 V

0.4 V

1.25 V

23 µA

VPWR

23 µA

Copyright © 2016, Texas Instruments Incorporated

OVP

LM5035C

STANDBY

R2

R1

5V

1.25 V

23 PA

VPWR

Copyright © 2016, Texas Instruments Incorporated

UVLO

LM5035C

R2

R1

VPWR

0.4 V

1.25 V

23 PA

Disable VCC and REF

Regulators

Disable Output Drivers

Copyright © 2016, Texas Instruments Incorporated

27

LM5035C

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SNVS631D – JANUARY 2010 – REVISED OCTOBER 2016

Product Folder Links: LM5035C

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For example, if the LM5035C is to be enabled when VPWR reaches 34 V, and disabled when VPWR is decreased

to 32 V, R1 should be 87 kΩ, and R2 should be 3.54 kΩ. The voltage at the UVLO pin should not exceed 7 V at

any time. Be sure to check both the power and voltage rating (0603 resistors can be rated as low as 50 V) for the

selected R1 resistor.

Figure 20. Basic UVLO Configuration

Figure 21. Basic Overvoltage Protection

Figure 22. UVLO and OVP Divider