RS

OUT

LMT85

VDD

GND

CLOAD > 1100 pF

OPTIONAL

BYPASS

CAPACITANCE

OUT

LMT85

VDD

GND

OPTIONAL

BYPASS

CAPACITANCE

CLOAD ” 1100 pF

12

LMT85

SNIS168E – MARCH 2013 – REVISED OCTOBER 2017

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Device Functional Modes (continued)

8.4.3 Capacitive Loads

The LMT85 handles capacitive loading well. In an extremely noisy environment, or when driving a switched

sampling input on an ADC, it may be necessary to add some filtering to minimize noise coupling. Without any

precautions, the LMT85 can drive a capacitive load less than or equal to 1100 pF as shown in Figure 11. For

capacitive loads greater than 1100 pF, a series resistor may be required on the output, as shown in Figure 12.

Figure 11. LMT85 No Decoupling Required for Capacitive Loads Less Than 1100 pF

Figure 12. LMT85 with Series Resistor for Capacitive Loading Greater Than 1100 pF

Table 4. Recommended Series Resistor Values

CLOAD

MINIMUM RS

1.1 nF to 99 nF

3 kΩ

100 nF to 999 nF

1.5 kΩ

1 μF

800 Ω

8.4.4 Output Voltage Shift

The LMT85 is very linear over temperature and supply voltage range. Due to the intrinsic behavior of an

NMOS/PMOS rail-to-rail buffer, a slight shift in the output can occur when the supply voltage is ramped over the

operating range of the device. The location of the shift is determined by the relative levels of VDD and VOUT. The

shift typically occurs when VDD- VOUT = 1 V.

This slight shift (a few millivolts) takes place over a wide change (approximately 200 mV) in VDD or VOUT.

Because the shift takes place over a wide temperature change of 5°C to 20°C, VOUT is always monotonic. The

accuracy specifications in the Accuracy Characteristics table already include this possible shift.