LP5030 datasheet(8/61 Pages) TI2

8 / 61 page

LP5030, LP5036

SLVSEH1B – SEPTEMBER 2018 – REVISED JANUARY 2019

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Product Folder Links: LP5030 LP5036

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(1)

Specified by design

7.5 Electrical Characteristics

over operating ambient temperature range (–40°C < TA<85°C) (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

POWER SUPPLIES (VCC)

VVCC

Supply voltage(1)

2.7

5.5

IVCC

Shutdown supply current

VEN = 0 V

0.2

µA

Standby supply current

VEN = 3.3 V, Chip_EN = 0 (bit)

Normal-mode supply current

With 10-mA LED current per OUTx

6.5

Power-save mode supply current

VEN = 3.3 V, Chip_EN = 1 (bit),

Power_Save_EN = 1 (bit), all the LEDs

off duration > tPSM

µA

VUVR

Undervoltage restart

VVCC rising

2.5

VUVF

Undervoltage shutdown

VVCC falling

VUV_HYS

Undervoltage shutdown hysteresis

0.2

OUTPUT STAGE (OUTx)

IMAX

Maximum sink current (OUT0 – OUT35)

VVCC in full range, Max_Current_Option =

0 (bit), PWM = 100%

25.5

Maximum sink current (OUT0 – OUT35)

VVCC ≥ 3.3 V, Max_Current_Option = 1

(bit), PWM = 100%

ILIM

Internal sink current limit (OUT0 –

OUT35)

VVCC in full range, Max_Current_Option =

0 (bit), VIREF = 0 V

Internal sink current limit (OUT0 –

OUT35)

VVCC ≥ 3.3V, Max_Current_Option=1 (bit),

VIREF = 0 V

120

ILKG

Leakage current (OUT0 – OUT35)

PWM = 0%

0.1

µA

IERR_DD

Device to device current error,

IERR_DD=(IAVE-ISET)/ISET×100%

VVCC = 3.3V. All channels' current set to

10 mA. PWM = 100%. Already includes

the VIREF and KIREF tolerance

–5%

IERR_CC

Channel to channel current error,

IERR_CC=(IOUTX-IAVE)/IAVE×100%

VVCC = 3.3V. All channels' current set to

10 mA. PWM = 100%. Already includes

the VIREF and KIREF tolerance

–5%

VIREF

IREF voltage(1)

0.7

KIREF

IREF ratio(1)

105

ƒPWM

PWM switching frequency(1)

kHz

VSAT

Output saturation voltage

VVCC in full range, Max_Current_Option =

0 (bit), output current set to 20 mA, the

voltage when the LED current has

dropped 5%

0.25

0.35

VVCC ≥ 3.3 V, Max_Current_Option = 1

(bit), output current set to 20 mA, the

voltage when the LED current has

dropped 5%

0.3

0.4

LOGIC INPUTS (EN, SCL, SDA, ADDRx)

VIL

Low level input voltage

0.4

VIH

High level input voltage

1.4

ILOGIC

Input current

–1

µA

VSDA

SDA output low level

IPULLUP = 5 mA

0.4

LP5030 数据表(PDF) 8 Page - Texas Instruments

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LP5030 数据表(PDF) 8 Page - Texas Instruments

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