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STW4810CHDRLF 数据表(PDF) 61 Page - STMicroelectronics

部件名 STW4810CHDRLF
功能描述  Power management for multimedia processors
PDF  78 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STW4810CHDRLF 数据表(HTML) 61 Page - STMicroelectronics

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Electrical and timing characteristics
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5.4.4
CMOS input/output static characteristics: VBAT level
Table 48.
CMOS input/output static characteristics: VBAT level
Symbol
Description
Test conditions
Min.
Typ.
Max.
Units
IT_WAKE_UP, PON, GPO1, GPO2
VIL
Low level input
voltage
PON
0.3*Vbat
V
VIH
High level input
voltage
PON
0.7*Vbat
V
IIL
Low level input
current
PON
-1.0
1.5
µA
IIH
High level input
current
PON
-1.0
1.5
µA
CIN
Input capacitance
10
pF
VOL
Low level output
voltage
IT_WAKE_UP,
GPO1, GPO2
IOL = 2mA
0.2*Vbat
V
VOH
High level output
voltage
IT_WAKE_UP,
GPO1, GPO2
IOL = 2 mA
0.8*Vbat
V
tOF
Output fall time
Capacitance 10pF
5
ns
tOR
Output rise time
Capacitance 10pF
50
ns
CI/O
Driving capability
100
pF



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