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MB85AS12MTPW-GAERE1 数据表(PDF) 2 Page - RAMXEED LIMITED |
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MB85AS12MTPW-GAERE1 数据表(HTML) 2 Page - RAMXEED LIMITED |
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2 / 27 page ![]() MB85AS12MT 2 DS501-00071-1v1-E PIN ASSIGNMENT PIN FUNCTIONAL DESCRIPTIONS Pin Name Functional description CS Chip Select pin This is an input pin to make chips select. When CS is “H” level, device is in deselect (standby) status and SO becomes High-Z. Inputs from other pins are ignored for this time. When CS is “L” level, device is in select (active) status. CS has to be “L” level before inputting op-code. SCK Serial Clock pin This is a clock input pin to input/output serial data. SI is loaded synchronously to a rising edge, SO is output synchronously to a falling edge. SI/SO Serial Data Input/Output pin This is an input/output pin of serial data. It inputs op-code, address, and writing data.In case of read command, it outputs read data of ReRAM memory cell array or data of sta- tus register after inputing op-code/address. VDD Supply Voltage pin VSS Ground pin (BOTTOM VIEW) 11-pin WLP Type-A VSS VSS VSS VSS VSS VSS VSS VDD SI/SO SCK CS |
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