List of figures

Figure 1.

Internal block diagram (showing one channel only) ........................................... 2

Figure 2.

Pin connections (top view, PCB view)

................................................... 3

Figure 3.

Test circuit for characterizations ........................................................ 7

Figure 4.

Test board ....................................................................... 8

Figure 5.

Output power (THD = 10%) vs. supply voltage .............................................. 9

Figure 6.

THD vs. output power ............................................................... 9

Figure 7.

THD vs. frequency (1 W) ............................................................. 9

Figure 8.

THD vs. frequency (100 mW) .......................................................... 9

Figure 9.

Frequency response ................................................................ 9

Figure 10.

FFT performance (0 dBFS) ........................................................... 9

Figure 11.

FFT performance (-60 dBFS) .......................................................... 9

Figure 12.

Output power (THD = 10%) vs. supply voltage ............................................. 10

Figure 13.

THD vs. output power .............................................................. 10

Figure 14.

THD vs. frequency (1 W) ............................................................ 10

Figure 15.

THD vs. frequency (100 mW) ......................................................... 10

Figure 16.

Frequency response ............................................................... 10

Figure 17.

FFT performance (0 dB) ............................................................ 10

Figure 18.

FFT performance (-60 dB) ........................................................... 10

Figure 19.

Application circuit for 6 Ω or 8 Ω speakers ................................................ 11

Figure 20.

Standby and mute circuits ........................................................... 12

Figure 21.

Turn on/off sequence for minimizing speaker “pop” .......................................... 12

Figure 22.

Input circuit and frequency response .................................................... 13

Figure 23.

Master and slave connection ......................................................... 14

Figure 24.

Typical LC filter for an 8 Ω speaker ..................................................... 14

Figure 25.

Typical LC filter for a 6 Ω speaker ...................................................... 14

Figure 26.

Behavior of pin DIAG for various protection conditions ........................................ 15

Figure 27.

PowerSSO-36 EPU package outline .................................................... 16

TDA7498

List of figures

DS6437 - Rev 10

page 21/22