AMC7836IPAP datasheet(40/91 Pages) TI2

40 / 91 page

AMC7836

SLAS986D – NOVEMBER 2014 – REVISED FEBRUARY 2018

www.ti.com

Product Folder Links: AMC7836

Submit Documentation Feedback

7.4 Device Functional Modes

The sixteen DACs in the AMC7836 device are split into four groups, each with four DACs. The output range and

clamp voltage for each DAC group is set independently which enables the device to operate in one of the

following modes:

•

All-positive DAC range mode

•

All-negative DAC range mode

•

Mixed DAC range mode

7.4.1 All-Positive DAC Range Mode

In the AMC7836 all-positive DAC range mode, each of the four DAC groups is set to a positive voltage output

range (0 to 5 V or 0 to 10 V).

Because the maximum DAC output for each group cannot exceed the common AVCC voltage for the device

(AVCC = AVCC_AB = AVCC_CD), a DAC group in the 0 to 10 V output range forces the AVCC voltage to a value

greater or equal to 10 V even if the remaining DAC groups are set in the 0 to 5 V range. If all DAC groups are

set in the 0 to 5 V range the AVCC voltage can be set to a value as low as 5 V.

The minimum DAC output for each group cannot be lower than the AVSS voltage but because the minimum DAC

output is 0 V in the all-positive DAC range mode, all of the AVSS pins (AVEE, AVSSB, AVSSC, and AVSSD) as well

as the device thermal pad can be tied to AGND thus simplifying the board design. Table 5 lists the typical

configurations for this mode.

Table 5. All-positive DAC Range Mode Typical Configuration

NOTES

TYPICAL CONNECTION

AVDD

5 V

DVDD

DVDD must be equal to AVDD.

5 V

IOVDD

IOVDD must be equal to or less than DVDD.

1.8 V to 5 V

AVCC_AB, AVCC_CD

The AVCC_AB and AVCC_CD pins must be tied

to the same potential (AVCC).

AVCC must be greater or equal than the

maximum possible output voltage for any of

the sixteen DACs.

AVCC ≥ 5 V

AVCC ≥ 10 V

AVEE

AGND

AVSSB, AVSSC, AVSSD

AGND

Thermal Pad

AGND

After power-on or a reset event the output range for each DAC group is set automatically by the voltage present

on the corresponding AVSS pin. In the all-positive DAC range mode all AVSS pins are connected to AGND and

consequently all four DAC groups will initialize by default to the 0 to 5 V range. The output for any of the DAC

groups can be modified to the 0 to 10 V range after initialization by setting the corresponding DAC range register

(address 0x1E to 0x1F) to 110b.

In addition to setting the default output range, the AVSS pins also set the clamp voltage for each DAC group.

Because the clamp voltage is only dependent on the voltage in the AVSS pin, changes to the DAC range

registers do not affect the clamp setting. With the AVSS pins connected to AGND, the clamp voltage for all

sixteen DACs is 0 V.

AMC7836IPAP 数据表(PDF) 40 Page - Texas Instruments

AMC7836IPAP 数据表(HTML) 40 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

数据表下载

链接网址

AMC7836IPAP 数据表(PDF) 40 Page - Texas Instruments

AMC7836IPAP 数据表(HTML) 40 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

数据表 下载

链接网址

数据表下载