Figure 6. Typical single BTL configuration

10µH

10µH

100nF

FILM

100nF

X7R

100nF

X7R

1µF

X7R

2200µF

63V

470nF

FILM

100nF

FILM

100nF

10K

10K

6.2

1/2W

6.2

1/2W

100nF

X7R

100nF

X7R

Add.

IN1A

IN1A

VL

CONFIG

PWRDN

nPWRDN

FAULT

TRI-STATE

TH_WAR

TH_WAR

+3.3V

100nF

100nF

X7R

IN1B

VDD

VDD

VSS

VSS

VCCSIGN

VCCSIGN

GND-Reg

GND-Clean

IN1B

IN2A

29

.

C

.

N

3

2

24

25

27

26

28

30

21

22

33

34

35

36

17

16

18

OUT1A

GND1B

OUT1A

VCC1B

10

13

11

OUT1B

GND1A

OUT1B

14

32V

330pF

22Ω

1/2W

4Ω

GND2A

6

2

12

VCC1A

15

VCC2B

4

VCC2A

7

3

OUT2B

GND2B

OUT2B

5

19

31

20

GNDSUB

1

IN2B

32

8

9

OUT2A

OUT2A

1µF

X7R

32V

Figure 7. Typical quad half bridge configuration

L11 22µH

L12 22µH

C51

1µF

C71

100nF

C91

1µF

C81

100nF

C31 820µF

C21

2200µF

C58

100nF

C58

100nF

R57

10K

R59

10K

R41

20

R61

5K

R62

5K

R51

6

C53

100nF

C60

100nF

C61

100nF

15

M3

IN1A

IN1A

VL

CONFIG

PWRDN

PWRDN

FAULT

TRI-STATE

TH_WAR

TH_WAR

+3.3V

IN1B

VDD

VDD

VSS

VSS

VCCSIGN

VCCSIGN

GND-Reg

GND-Clean

IN2A

IN1B

IN2A

IN2B

PROTECTIONS

&

LOGIC

REGULATORS

29

23

24

25

27

26

28

30

21

22

33

34

35

36

M2

M5

M4

17

16

OUTPL

PGND1P

OUTPL

VCC1P

14

12

10

11

OUTNL

PGND1N

OUTNL

VCC1N

13

C52

1µF

+VCC

C62

100nF

7

M17

M15

M16

M14

8

9

OUTPR

PGND2P

OUTPR

VCC2P

6

4

2

3

OUTNR

PGND2N

OUTNR

VCC2N

5

19

31

20

GNDSUB

1

IN2B

32

C72

100nF

C92

1µF

C82

100nF

R52

6

C41

330pF

R42

20

C42

330pF

C32 820µF

L13 22µH

L14 22µH

C73

100nF

C93

1µF

C83

100nF

C33 820µF

R43

20

R53

6

C74

100nF

C94

1µF

C84

100nF

R54

6

C43

330pF

R44

20

C44

330pF

C34 820µF

R63

5K

R64

5K

R65

5K

R66

5K

R67

5K

R68

5K

4Ω

4Ω

4Ω

4Ω

For more information refer to the application note AN1661.

STA508

Test circuits and typical application diagrams

DS3503 - Rev 6

page 9/19