List of figures

Figure 1.

Typical application and test circuit ....................................................... 2

Figure 2.

Pin connection (top view) ............................................................. 3

Figure 3.

Block diagram .................................................................... 4

Figure 4.

PCB.and components layout of the circuit of figure below. (1:1 scale) .............................. 8

Figure 5.

Output power vs. supply voltage (RI = 8 Ω) ............................................... 10

Figure 6.

Distortion vs. output power (RI = 8 Ω) ................................................... 10

Figure 7.

Output power vs. supply voltage (RI = 4 Ω) ............................................... 10

Figure 8.

Distortion vs. output power (RI = 4 Ω) ................................................... 10

Figure 9.

Distortion vs. frequency (RI = 8 Ω) ..................................................... 11

Figure 10.

Distortion vs. frequency (RI = 4 Ω) ..................................................... 11

Figure 11.

Quiescent current vs. supply voltage .................................................... 11

Figure 12.

Supply voltage rejection vs. frequency ................................................... 11

Figure 13.

Mute attenuation vs. Vpin10........................................................... 12

Figure 14.

St-by attenuation vs. Vpin9 ........................................................... 12

Figure 15.

Power dissipation vs. output power (RI = 4 Ω).............................................. 12

Figure 16.

Power dissipation vs. output power (RI = 8 Ω).............................................. 12

Figure 17.

Principle schematic of a DMOS unity-gain buffer ............................................ 14

Figure 18.

Turn ON/OFF suggested sequence ..................................................... 15

Figure 19.

Single signal ST-BY/MUTE control circuit ................................................. 15

Figure 20.

High efficiency application circuit....................................................... 18

Figure 21.

P.C.B. and components layout of the circuit of figure 18 (1:1 scale) ............................... 18

Figure 22.

Power dissipation vs. output power (RI = 4 Ω).............................................. 20

Figure 23.

Distortion vs. output power (RI = 4 Ω) ................................................... 20

Figure 24.

Distortion vs. output power (RI = 8 Ω) ................................................... 20

Figure 25.

Power dissipation vs. output power (RI = 4 Ω).............................................. 20

Figure 26.

Power dissipation vs. output power (RI = 8 Ω).............................................. 21

Figure 27.

Bridge application circuit ............................................................ 22

Figure 28.

Frequency response of the bridge application .............................................. 23

Figure 29.

Distortion vs. output power (RI = 8 Ω) ................................................... 23

Figure 30.

Distortion vs. output power (RI = 16 Ω) .................................................. 23

Figure 31.

Multiwatt15 V package outline ........................................................ 25

Figure 32.

Multiwatt15 H package outline ........................................................ 26

TDA7294

List of figures

DS0013 - Rev 8

page 30/31