Pin connection

L6390

4/25

DocID14493 Rev 11

2

Pin connection

Figure 2. Pin connection (top view)

Table 1. Pin description

Pin no.

Pin name

Type

Function

1LIN

I

Low-side driver logic input (active low)

2SD/OD (1)

1. The circuit provides less than 1 V on the LVG and HVG pins (at Isink = 10 mA), with VCC > 3 V. This allows

the omission of the “bleeder” resistor connected between the gate and the source of the external MOSFET

normally used to hold the pin low; the gate driver assures low impedance also in SD condition.

I/O

Shutdown logic input (active low)/open drain

(comparator output)

3

HIN

I

High-side driver logic input (active high)

4

VCC

P

Lower section supply voltage

5

DT

I

Deadtime setting

6

OP-

I

Op amp inverting input

7

OPOUT

O

Op amp output

8

GND

P

Ground

9

OP+

I

Op amp non-inverting input

10

CP+

I

Comparator input

11

LVG (1)

O

Low-side driver output

12, 13

NC

Not connected

14

OUT

P

High-side (floating) common voltage

15

HVG (1)

O

High-side driver output

16

BOOT

P

Bootstrap supply voltage