Application information

L5150CJ, L5150CS

16/34

DS6184 Rev 18

3.2

Reset

The reset circuit monitors the output voltage Vo. If the output voltage becomes lower than

Vo_th then Res goes low with a delay time (trr). When the output voltage becomes higher

than Vo_th then Res goes high with a delay time trd. This delay is obtained by 32 periods of

oscillator. The oscillator period is given by:

Equation 1

Tosc = [(VRhth - VRlth) x Ctr] / Icr + [(VRhth - VRlth) x Ctr] / Idr

where:

Icr = 20 µA is an internally generated charge current,

Idr = 20 µA is an internally generated discharge current,

VRhth = 2.5 V (typ) and VRlth = 0.9 V (typ) are two voltage thresholds,

Ctr is an external capacitor put between Vcr pin and GND.