Electrical specifications

L9347

10/29

.

tD

Status delay time

(5)

896

1024

us

tRE

Regulation error status delay time

(5)

(reg. channels only)

10

ms

tDreg

Output off status delay time

(5)

(reg. channels only

528

s

Reg. current accuracy (reg. channels only)

IQ3/Q4

Minimum current

DC = 10%

200

250

300

mA

IQ3/Q4

Maximum current

DC = 90%

2

2.25

2.5

A

IREG

Max. regulation deviation @

DC 10% - 90%

250mA < IQ3/Q4 < 400mA

400mA

 I

Q3/Q4 800mA

800mA < IQ3/Q4 < 2.25A

±10

±6

±10

%

%

%

I

Q3/Q4

Min. quant. step

5

mA

Frequencies

CLK frequency

crystal-controlled

250

kHz

Input PWM frequency

(reg. channels only)

2

kHz

1.

This parameter will not be tested but assured by design

2.

Short circuit between two digital outputs (one in high the other in low state) will lead to the defined result "LOW"

3.

Measured chip, bond wires not included

4.

Measured on Power SO-36 devices

5.

Digital filtered with external clock, only functional test

Table 3.

Electrical characteristcs: (continued)

(Vs = 4.8 to 18V; Tj = -40 to 150°C unless otherwise specified)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Table 4.

Absolute maximum ratings

The absolute maximum ratings are the limiting values for this device. Damage may occur if

this device is subjected to conditions which are beyond these values

Symbol

Parameter

Test conditions

Min

Typ

Max

Unit

EQ

Switch off energy for inductive loads

50

mJ

Voltages

VS

Supply voltage

-0.3

40

V

VCC, VDD

Supply voltage

-0.3

6

V

VQ

Output voltage static

40

V

VQ

Output voltage during clamping

t < 1ms

60

V

VIN, VEN

Input voltage IN1 to IN4, EN

II < |10|mA

-1.5

6

V

VCLK

Input Voltage CLK

-1.5

6

V

VST

Output voltage status

-0.3

6

V

VD

Recirculation circuits D3, D4

40

V

VDRmax

max. reverse breakdown voltage of free

wheeling diodes D3, D4

55

V