MP3367

– 6-CHANNEL BOOST WLED DRIVER WITH HIGH DIM RATIO AND I2C

MP3367 Rev. 1.0

www.MonolithicPower.com

4

6/17/2019

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PACKAGE REFERENCE

TOP VIEW

TOP VIEW

QFN-24 (4mmx4mm)

TSSOP28-EP

PIN FUNCTIONS

QFN-24

Pin #

TSSOP28-EP

Pin #

Name

Description

1

5

DIM

PWM signal input pin. Apply a PWM signal on DIM for brightness control.

Pulled low internally. A 100Hz to 20kHz PWM signal is recommended.

2

6

MIX/AD

Dimming mode set pin. MIX/AD is a current source output (18

μA).

Connect a resistor to program its voltage. When MIX/AD is low-level

(<0.3V), mix dimming is adopted. When MIX/AD is mid-level (0.5V to

0.8V), PWM dimming is adopted. When MIX/AD is high-level (1.0V to

1.3V), analog dimming is adopted. When MIX/AD is floated, the dimming

mode is set by the internal MODE register.

3

7

FREQ/SYNC

Switching frequency setting and SYNC pin. The switching frequency is

decided by the voltage and current on this pin. Connect a resistor between

FREQ/SYNC

and GND to set the converter’s switching frequency, or

connect an external clock to the sync boost switching frequency. Leave

FREQ/SYNC floating if the internal switching frequency set register

FSW1:0 is used.

4

8

EN

IC enable pin. Pull EN high to enable the IC. When EN is pulled low, the

IC enters shutdown.

5

9

SCL/PSE

I2C interface clock input pin. Tie SDA/PSE together with SCL/PSE and

pull up to 0.75V to 1V to enable the phase-shift PWM dimming function.

6

10

SDA/PSE

I2C interface data input pin. Tie SCL/PSE together with SDA/PSE and

pull up to 0.75V to 1V to enable the phase-shift PWM dimming function.

7

11

COMP

Compensation pin.

8

12

FF

Fault flag pin. Open-drain during normal operation, pulled to low in any

fault mode.