INA331 datasheet(12/24 Pages) TI2

12 / 24 page

INA331, INA2331

SBOS215C

www.ti.com

OFFSET VOLTAGE ERROR CALCULATION

The offset voltage (VOS) of the INA331IDGK is specified at a

maximum of 500

µV with a +5V power supply and the com-

mon-mode voltage at VS/2. Additional specifications for power-

supply rejection and common-mode rejection are provided to

allow the user to easily calculate worst-case expected offset

under the conditions of a given application.

Power-Supply Rejection Ratio (PSRR) is specified in

µV/V.

For the INA331, worst case PSRR is 200

µV/V, which means

for each volt of change in power supply, the offset may shift

up to 200

µV. Common-Mode Rejection Ratio (CMRR) is

specified in dB, which can be converted to

µV/V using the

following equation:

CMRR (in

µV/V) = 10[(CMRR in dB)/–20] • 106

For the INA331, the worst case CMRR over the specified

common-mode range is 90dB (at G = 25) or about 30

µV/V

This means that for every volt of change in common-mode,

the offset will shift less than 30

µV.

These numbers can be used to calculate excursions from the

specified offset voltage under different application condi-

tions. For example, an application might configure the ampli-

fier with a 3.3V supply with 1V common-mode. This configu-

ration varies from the specified configuration, representing a

1.7V variation in power supply (5V in the offset specification

versus 3.3V in the application) and a 0.65V variation in

common-mode voltage from the specified VS/2.

Calculation of the worst-case expected offset would be as

follows:

Adjusted VOS = Maximum specified VOS +

(power-supply variation) • PSRR +

(common-mode variation) • CMRR

VOS = 0.5mV + (1.7V • 200µV) + (0.65V • 30µV)

±0.860mV

However, the typical value will be smaller, as seen in the

Typical Characteristics.

FEEDBACK CAPACITOR IMPROVES RESPONSE

For optimum settling time and stability with high-impedance

feedback networks, it may be necessary to add a feedback

capacitor across the feedback resistor, RF, as shown in

Figure 8. This capacitor compensates for the zero created by

the feedback network impedance and the INA331’s RG-pin

input capacitance (and any parasitic layout capacitance).

The effect becomes more significant with higher impedance

networks. Also, RX and CL can be added to reduce high-

frequency noise.

It is suggested that a variable capacitor be used for the

feedback capacitor since input capacitance may vary be-

tween instrumentation amplifiers, and layout capacitance is

difficult to determine. For the circuit shown in Figure 8, the

value of the variable feedback capacitor should be chosen by

the following equation:

RIN • CIN = RF • CF

Where CIN is equal to the INA331’s RG-pin input capacitance

(typically 3pF) plus the layout capacitance. The capacitor can

be varied until optimum performance is obtained.

FIGURE 8. Feedback Capacitor Improves Dynamic Perfor-

mance.

INA331

V+

OUT

IN • CIN = RF • CF

Where C

IN is equal to the INA331’s input capacitance

(approximately 3pF) plus any parastic layout capacitance.

Shutdown

IN–

V–

IN+

REF

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