Block and pin description diagrams

TDA7391

6/13

DocID1509 Rev 5

Table 2. Pin functional description

Pin#

Pin name

Description

1, 2

INPUTS

The input stage is a high impedance type also capable of operation in single

ended mode with one input capacitively coupled to the signal GND. The

impedance seen by the inverting and non inverting input pins must be

matched.

3,9

+V

Supply voltage.

4CD

The TDA7391 is equipped with a diagnostic circuitry able to detect the clipping

in the Output Signal (distortion = 10%).

The CD pin (open collector) gives out low level signal during clipping.

5, 7

OUTPUTS

The output stage is a bridge type able to drive loads as low as 3.2

. It consists

of two class AB fully complementary PNP/NPN stages fully protected.

A rail to rail output voltage swing is achieved without need of bootstrap

capacitors. No external compensation is necessary.

6

GND

Ground.

8

STAND-BY

The device features a standby function which shuts down all the internal bias

supplies when the STAND-BY pin is low. In standby mode the amplifier sinks a

small current (in the range of few

A). When the STAND-BY pin is high the IC

becomes fully operational.

10

SYNC

A resistor (R2) has to be connect between pin 10 and GND in order to program

the current that flows in the C3 capacitor (pin 11). The values of C3 and R2

determine the time required to bias the amplifier.

11

MUTE

The pin will have a capacitor (C3) tied to GND to set the MUTE/STAND-BY

time. An automatic Mute during turn on/off is provided to prevent noisy

transients.