AB-RTC-TNA-32.768kHz-2

Ultra-Low Power RTC Module

Revision: Initial Release

9/9/2025

Page 6

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SYMBOL

PARAMETER

Conditions

MIN

MAX

UNIT

fSCL

SCL input clock frequency

VDD ≥ 1.5 V

0

100

kHz

VDD ≥ 2.0 V

0

400

tLOW

Low period of SCL clock

VDD ≥ 1.5 V

4.7

µs

VDD ≥ 2.0 V

1.3

tHIGH

High period of SCL clock

VDD ≥ 1.5 V

4.0

µs

VDD ≥ 2.0 V

0.6

tRISE

Rise time of SDA and SCL

VDD ≥ 1.5 V

1000

ns

VDD ≥ 2.0 V

300

tFALL

Fall time of SDA and SCL

VDD ≥ 1.5 V

300

ns

VDD ≥ 2.0 V

300

tHD:STA

START condition hold time

VDD ≥ 1.5 V

4.0

µs

VDD ≥ 2.0 V

0.6

tSU:STA

START condition setup time

VDD ≥ 1.5 V

4.7

µs

VDD ≥ 2.0 V

0.6

tSU:DAT

SDA setup time

VDD ≥ 1.5 V

250

ns

VDD ≥ 2.0 V

100

tHD:DAT

SDA hold time

VDD ≥ 1.5 V

0

µs

VDD ≥ 2.0 V

0

tSU:STO

STOP condition setup time

VDD ≥ 1.5 V

4.0

µs

VDD ≥ 2.0 V

0.6

tBUF

Bus free time before a new transmission

VDD ≥ 1.5 V

4.7

µs

VDD ≥ 2.0 V

1.3

S = Start condition, Sr = Repeated Start condition, P = Stop condition

I2C BUS Timing Characteristics

I2C AC Characteristics (TA = -40 to +85°C, TYP values at 25°C)