AB-RTC-XB-32.768kHz-2

Real Time Clock Module with I2C Bus

Revision:

Initial Release 12/10/2024

Page 3

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Note 1: To apply Min. value of VDD, VDD needs to be supplied with more than 2.5V at least for the oscillation to stabilize (oscillation start time tSTA). Please ensure

that force the power to VDD rather than VBAT when first power on.

Note 2: Ensure that the power on time from 0 to VDD is less than 100ms

IDD2

3.4

7.8

uA

SCL=SDA = ‘H’,

FOUT=32.768kHz (FOUT pin

CL=15pF), INT=OFF,

VDD=VIO=3.0V, CHGEN=0b or

VBAT

≧VDET3,-40℃~85℃

IDD3

1.0

5.0

uA

SCL, SDA = ‘L’,

VBAT=3.0V, VDD=VIO=0V, -

40℃~+85℃

I2C clock signal (pad 2)

SCL

Input voltage high-level

VIH

0.8*VIO

5.5

V

Input voltage low-level

VIL

GND-0.3

0.2*VIO

V

I2C data signal (pad 3)

SDA

Input voltage high-level

VIH

0.8*VIO

5.5

V

Input voltage low-level

VIL

GND-0.3

0.2*VIO

V

Output voltage Low-level

VOL

GND

GND+0.4

V

Frequency Output (pad 4)

FOUT

Output voltage high-level

VOH

VIO-0.5

VIO

V

IOH=-1mA

Output voltage low-level

VOL

GND

GND+0.5

V

IOL=1mA

Reset signal output (pad 5)

RST

Output voltage low-level

VOL

GND

GND+0.25

V

VIO=5.0V,IOL-1mA

Intterupt output (pad 6)

INT

Output voltage low-level

VOL

GND

GND+0.4

V

VIO=3.0V,IOL-1mA

Internal voltage output (pad 9)

VOUT

VOUT output voltage1

VOUT1

VDD-0.06V

V

VDD=3.0V，IOUT=1mA

VOUT output voltage2

VOUT2

VBAT-0.02V

V

VBAT=3.0V，IOUT=0.1mA

Parameters

Symbol

Min.

Typ.

Max.

Units

Notes

Start condition setup time[Note 1]

tHD;STA

0.6

us

Start condition hold time[Note 1]

tSU;STA

0.6

us

Stop condition setup time

tSU;STO

0.6

us

Bus idle time between start

condition and stop condition

tRCV

1.3

us

Data setup time

tSU;DAT

100

ns

Data hold time

tHD;DAT

0

ns

I2C clock signal (pad 2)

SCL

SCL clock frequency

fSCL

400

kHz

AC Characteristics (Unless otherwise specified, GND =0V, VIO =1.6V ~ 5.5V; Ta=-40

℃~+85℃)