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TDA2005 数据表(PDF) 9 Page - STMicroelectronics |
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TDA2005 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 25 page ![]() TDA2005 Electrical specifications Doc ID 1451 Rev 6 9/25 2.3.2 Bridge amplifier design The following considerations can be useful when designing a bridge amplifier. Where: VCE sat = output transistors saturation voltage VS = allowable supply voltage RL = load impedance Voltage and current swings are twice for a bridge amplifier in comparison with single ended amplifier. In other words, with the same RL the bridge configuration can deliver an output power that is four times the output power of a single ended amplifier, while, with the same max output current the bridge configuration can deliver an output power that is four times the output power of a single ended amplifier, while, with the same max output current the bridge configuration can deliver an output power that is twice the output power of a single ended amplifier. Core must be taken when selecting VS and RL in order to avoid an output peak current above the absolute maximum rating. From the expression for IOmax, assuming VS = 14.4 V and VCE sat = 2 V, the minimum load that can be driven by TDA2005 in bridge configuration is: The voltage gain of the bridge configuration is given by (see Figure 36): Table 5. Bridge amplifier design Parameter Single ended Bridge Vo max Peak output voltage (before clipping) Io max Peak Output current (before clipping) Po max RMS output power (before clipping) 1 2 --- V s 2V CEsat – V s 2V CEsat – 1 2 --- V s 2V CEsat – R L ----------------------------------- V s 2V CEsat – R L ----------------------------------- 1 4 --- V s 2V CEsat – 2 2R L ------------------------------------------- V s 2V CEsat – 2 2R L ------------------------------------------- R Lmin V s 2V CEsat – I Omax ------------------------------------ 14.4 4 – 3.5 --------------------- 2.97 == = G v V 0 V 1 ------- 1 R 1 R 2 R4 R 2 R 4 + --------------------- -------------------------- R 3 R 4 ------- ++ == |
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