5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2)

MIN

MAX

UNIT

VIN

Continuous input voltage range (for legacy chip)

–0.3

16

V

Continuous input voltage range (for new chip)

–0.3

18

VOUT

Output voltage range (for legacy chip)

–0.3

9

V

Output voltage range (for new chip)

–0.3

VIN + 0.3 or 9 (whichever is

smaller)

VBYPASS

BYPASS pin voltage range (for new chip)

–0.3

3

V

VON/OFF

ON/OFF pin voltage range (for legacy chip)

–0.3

16

V

ON/OFF pin voltage range (for new chip)

–0.3

18

Current

Maximum output

Internally limited

A

Temperature

Operating junction, TJ

–55

150

°C

Storage, Tstg

–65

150

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2)

All voltages with respect to GND.

5.2 ESD Ratings

VALUE

(Legacy

Chip)

VALUE

(New

Chip)

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

±3000

V

Charged device model (CDM), per JEDEC specification JESD22-C101(2)

±500

±1000

(1)

JEDEC document JEP155 states that 2-kV HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 500-V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

MIN

NOM

MAX

UNIT

VIN

Supply input voltage (for legacy chip)

2.2

16

V

Supply input voltage (for new chip)

2.5

16

VOUT

Output voltage (for legacy chip)

1.2

10.0

V

Output voltage (for new chip)

1.2

5.0

VBYPASS

Bypass voltage

1.2

V

VON/OFF

Enable voltage (for legacy chip)

0

VIN

V

Enable voltage (for new chip)

0

16

IOUT

Output current

0

250

mA

CIN (1)

Input capacitor

1

μF

COUT

Output capacitance (for legacy chip)

2.2

4.7

μF

Output capacitance (for new chip) (1)

1

2.2

200

COUT ESR(3)

Output capacitor ESR (for new chip)(2)

0

1

Ω

TJ

Operating junction temperature

–40

125

°C

(1)

All capacitor values are assumed to derate to 50% of the nominal capacitor value. Maintain an effective output capacitance of 1 μF

minimum for stability.

(2)

Details related to supported ESR range for the legacy chip are available in Recommended Capacitors for the Legacy Chip

(3)

Maximum supported ESR range for new chip is 1Ω. For output capacitor with higher ESR values, place a low ESR MLCC capacitor

with value of 100nF, close to the output pin of the LDO.

LP2992

SNVS171L – NOVEMBER 2001 – REVISED FEBRUARY 2025

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