5.5 Electrical Characteristics (continued)

specified at TJ = 25°C, VIN = VOUT(nom) + 1.0 V or VIN = 2.5 V (whichever is greater), IOUT = 1 mA, VON/OFF = 2 V, CIN = 1.0

µF, and COUT = 2.2 µF (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP MAX UNIT

ΔVOUT(ΔVIN) Line regulation

VO(NOM) + 1 V ≤ VIN ≤ 16 V

Legacy chip

0.007 0.014

%/V

New chip

0.002 0.014

VO(NOM) + 1 V ≤ VIN ≤ 16 V, –40°C ≤ TJ ≤ 125°C

Legacy chip

0.007 0.032

New chip

0.002 0.032

VIN(MIN)

Minimum input voltage required to maintain output regulation

Legacy chip

2.05

V

New chip

2.05

Minimum input voltage

required to maintain output

regulation

–40°C ≤ TJ ≤ 125°C

Legacy chip

2.2

New chip

2.35

IGND

GND pin current

IOUT = 0 mA

Legacy chip

65

95

µA

New chip

69

95

IOUT = 0 mA, –40°C ≤ TJ ≤ 125°C

Legacy chip

125

New chip

123

IOUT = 1 mA

Legacy chip

75

110

New chip

78

110

IOUT = 1 mA, –40°C ≤ TJ ≤ 125°C

Legacy chip

170

New chip

140

IOUT = 50 mA

Legacy chip

350

600

New chip

380

440

IOUT = 50 mA, –40°C ≤ TJ ≤ 125°C

Legacy chip

1000

New chip

650

IOUT = 150 mA

Legacy chip

850 1500

New chip

765

890

IOUT = 150 mA, –40°C ≤ TJ ≤ 125°C

Legacy chip

2500

New chip

1060

IOUT = 250 mA

Legacy Chip

1500 2300

New Chip

875 1010

IOUT = 250 mA, –40°C ≤ TJ ≤ 125°C

Legacy Chip

4000

New Chip

1200

VON/OFF < 0.3 V, VIN = 16 V

Legacy chip

0.01

0.8

New chip

1.25

1.75

VON/OFF < 0.15 V, VIN = 16 V, –40°C ≤ TJ ≤ 125°C

Legacy chip

0.05

2

New chip

1.12

2.75

LP2992

SNVS171L – NOVEMBER 2001 – REVISED FEBRUARY 2025

www.ti.com

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